Item type | Current library | Collection | Shelving location | Call number | Materials specified | Status | Notes | Date due | Barcode | |
---|---|---|---|---|---|---|---|---|---|---|
Books | BMU Library | Reference | 3-E | 621.392 PAD (Browse shelf(Opens below)) | Not For Loan | SOET | 5872 |
Browsing BMU Library shelves, Shelving location: 3-E, Collection: Reference Close shelf browser (Hides shelf browser)
621.392 CHA Digital systems design with VHDL and synthesis an integrated approach | 621.392 DAS VHDL design, synthesis, and simulation | 621.392 NAV Verilog digital system design : Register Transfer level synthesis, testbench, and verification | 621.392 PAD Design through verilog HDL | 621.392 PAL Verilog HDL : a guide to digital design and synthesis | 621.392 PAL Verilog HDL | 621.392 PER VHDL |
There are no comments on this title.
Log in to your account to post a comment.